Publications and communications

International journals with review committees

[1] Exact Lookup Tables for the Evaluation of Trigonometric and Hyperbolic Functions. Hugues De Lassus Saint-Geniès, David Defour, and Guillaume Revy.
Accepted to IEEE TC (Special Issue on Computer Arithmetic), 2017. [HAL]
[2] Trade-offs of certified fixed-point code synthesis for linear algebra basic blocks. Matthieu Martel, Amine Najahi, and Guillaume Revy.
Accepted to Journal of Systems Architecture, 2016. [HAL]
[3] Computing floating-point square roots via bivariate polynomial evaluation. Claude-Pierre Jeannerod, Hervé Knochel, Christophe Monat, and Guillaume Revy.
In J.D. Bruguera, M. Cornea, D. DasSarma, and J. Harrison, editors, IEEE Transactions on Computers, Special Section on Computer Arithmetic, volume 60(2), pages 214-227, IEEE Computer Society, February 2011. [DOI] [.bib] [RR] [HAL]

International conferences with review committees and proceedings

[4] Automated design of floating-point logarithm functions on integer processors. Guillaume Revy.
In P. Montuschi, M. Schulte, J. Hormigo, S. Oberman, and N. Revol, editors, 23th IEEE Symposium on Computer Arithmetic (ARITH'23), pages 172-180, Santa Clara, CA, USA, 10-13 July 2016. [DOI] [.bib] [HAL]
[5] Range Reduction Based on Pythagorean Triples for Trigonometric Function Evaluation. Hugues De Lassus Saint-Geniès, David Defour, and Guillaume Revy.
In 26th International Conference Application-specific Systems, Architectures and Processors (ASAP 2015), Toronto, Canada, 27-29 July 2015. [DOI] [.bib] [HAL]
[6] Toward the synthesis of fixed-point code for matrix inversion based on Cholesky decomposition. Matthieu Martel, Amine Najahi, and Guillaume Revy.
In 6th Conference on Design and Architectures for Signal and Image Processing (DASIP 2014), Madrid, Spain, 8-10 October 2014. [DOI] [.bib] [HAL]
[7] Automated Synthesis of Target-Dependent Programs for Polynomial Evaluation in Fixed-Point Arithmetic. Christophe Mouilleron, Amine Najahi, and Guillaume Revy.
In 16th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC 2014), Timisoara, Romania, 22-25 September 2014. [DOI] [.bib] [HAL]
[8] Code Size and Accuracy-Aware Synthesis of Fixed-Point Programs for Matrix Multiplication. Matthieu Martel, Amine Najahi, and Guillaume Revy.
In A. Ahrens, C. Benavente-Peces, andJ. Filipethe, editors, 4th International Conference on Pervasive and Embedded Computing and Communication Systems (PECCS 2014), pages 204-214, Lisbon, Portugal, 7-9 January 2014. [DOI] [.bib] [HAL]
[9] Design of Fixed-point Embedded Systems (DEFIS) French ANR Project. Daniel Ménard, Romuald Rocher, Olivier Sentieys, Nicolas Simon, Laurent-Stéphane Didier, Thibault Hilaire, Benoît Lopez, Éric Goubault, Sylvie Putot, Franck Védrine, Amine Najahi, Guillaume Revy, Laurent Fangain, Christian Samoyeau, Fabrice Lemonnier, and Christophe Clienti.
Demo Night of the 6th Conference on Design and Architectures for Signal and Image Processing (DASIP 2012), Karlsruhe, Germany, 23-25 October 2012. [.bib] [HAL]
[10] Automatic Generation of Fast and Certified Code for Polynomial Evaluation. Christophe Mouilleron and Guillaume Revy.
In E. Antelo, D. Hough, and P. Ienne, editors, 20th IEEE Symposium on Computer Arithmetic (ARITH'20), pages 233-242, Tuebingen, Germany, 25-27 July 2011. [DOI] [.bib] [HAL]
[11] How to square floats accurately and efficiently on the ST231 integer processor. Claude-Pierre Jeannerod, Jingyan Jourdan-Lu, Christophe Monat, and Guillaume Revy.
In E. Antelo, D. Hough, and P. Ienne, editors, 20th IEEE Symposium on Computer Arithmetic (ARITH'20), pages 77-81, Tuebingen, Germany, 25-27 July 2011. [DOI] [.bib] [HAL] [RR]
[12] Multiplicative square root algorithms for FPGAs. Florent de Dinechin, Mioara Joldes, Bogdan Pasca, and Guillaume Revy.
In 20th IEEE International Conference on Field Programmable Logic and Applications (FPL'2010), pages 574-577, Milano, Italy, 31 August - 2 September 2010. [DOI] [.pdf] [.bib] [HAL]
[13] Techniques and tools for implementing IEEE 754 floating-point arithmetic on VLIW integer processors. Christian Bertin, Claude-Pierre Jeannerod, Jingyan Jourdan-Lu, Hervé Knochel, Christophe Monat, Christophe Mouilleron, Jean-Michel Muller, and Guillaume Revy.
In 4th International Workshop on Parallel and Symbolic Computation (PASCO'2010), Grenoble, France, 21-23 July 2010. [DOI] [.bib]
[14] Optimizing correctly-rounded reciprocal square roots for embedded VLIW cores. Claude-Pierre Jeannerod and Guillaume Revy.
In 43rd Asilomar Conference on Signals, Systems, and Computers (Asilomar'09), Pacific Grove, CA, USA, 1-4 November 2009 (Copyright 2001 SS&C). [HAL] [.bib] [RR]
[15] A new binary floating-point division algorithm and its software implementation on the ST231 processor. Claude-Pierre Jeannerod, Hervé Knochel, Christophe Monat, Guillaume Revy, and Gilles Villard.
In J.D. Bruguera, M. Cornea, D. DasSarma, and J. Harrison, editors, 19th IEEE Symposium on Computer Arithmetic (ARITH'19), pages 95-103, Portland, OR, USA, 8-10 June 2009. [DOI] [.pdf] [.bib] [HAL]
[16] Faster floating-point square root for integer processors. Claude-Pierre Jeannerod, Hervé Knochel, Christophe Monat, and Guillaume Revy.
In 2nd IEEE International Symposium on Industrial Embedded Systems (SIES'2007), pages 324-327, Lisbon, Portugal, 4-6 July 2007. [DOI] [.pdf] [.bib]
[17] UML/XML-based approach to hierarchical AMS synthesis. Ian O'Connor, Faress Tissafi-Drissi, Guillaume Revy, and Frédéric Gaffiot.
In 2005 Forum on specification and Design Languages (FDL'2005), Lausanne, Switzerland, 27-30 September 2005.

National conferences with review committees and proceedings

[18] Performances de schémas d'évaluation polynomiale sur architectures vectorielles. Hugues De Lassus Saint-Geniès and Guillaume Revy.
In Conférence d'informatique en Parallélisme, Architecture et Système (Compas'2016), Lorient, France, 5-8 July 2016. [.bib] [HAL]
[19] Réduction d'argument basée sur les triplets pythagoriciens pour l'évaluation de fonctions trigonométriques. Hugues De Lassus Saint-Geniès, David Defour, and Guillaume Revy.
In Conférence d'informatique en Parallélisme, Architecture et Système (Compas'2015), Lille, France, 1-3 July 2015. [.bib] [HAL]
[20] Racines carrées multiplicatives sur FPGA. Florent de Dinechin, Mioara Joldes, Bogdan Pasca, and Guillaume Revy.
In RenPar'19, Sympa'13, and CFSE'7. Toulouse, France, 9-11 September 2009. [.pdf] [.bib] [RR]

International conferences with abstract only

[21] Approach based on instruction selection for fast and certified code generation. Christophe Mouilleron, Amine Najahi , and Guillaume Revy.
In 15th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN'2012), Novosibirsk, Russia, 23-29 September 2012. [.pdf] [.bib] [HAL]
[22] Techniques for the automatic debugging of scientific floating-point programs. David H. Bailey, James Demmel, William Kahan, Guillaume Revy, and Koushik Sen.
In 14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN'2010), Lyon, France, 27-30 September 2010. [.pdf] [.bib]

Ph.D. and Master's theses

[23] Implementation of binary floating-point arithmetic on embedded integer processors - Polynomial evaluation-based algorithms and certified code generation. Guillaume Revy.
Ph.D. Thesis, Université de Lyon - École Normale Supérieure de Lyon, France, 1 December 2009. [TEL] [.pdf] [.ps] [.bib] [Slides (.pdf)]
[24] Analyse et implantation d'algorithmes rapides pour l'évaluation polynomiale sur les nombres flottants. Guillaume Revy.
Master's Thesis (LIP - École Normale Supérieure de Lyon), Lyon, France, 16 June 2006. [HAL] [.bib] [Slides (.pdf)]

Talks

[25] Approach based on instruction selection for fast and certified code generation.
15th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN'2012), Novosibirsk, Russia, 23-29 September 2012. [Slides]
[26] Automatic Synthesis of Fast and Certified Code for Polynomial Evaluation.
Réunion ANR DEFIS, Paris, France, 29 Mars 2012. [Slides]
[27] Techniques for the automatic debugging of scientific floating-point programs.
Séminaire CCT/STIL (CNES), Toulouse, France, 19 January 2012. [Slides]
[28] Automatic Generation of Fast and Certified Code for Polynomial Evaluation.
Groupe de travail de l'équipe PEQUAN (LIP6, UPMC), Paris, France, 07 July 2011. [Slides]
[29] Techniques for the automatic debugging of scientific floating-point programs.
14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN'2010), Lyon, France, 27-30 September 2010. [Slides]
[30] Techniques for the automatic debugging of scientific floating-point programs.
Séminaire de l'équipe DALI (Laboratoire ELIAUS, Université de Perpignan Via Domitia), Perpignan, France, 23 September 2010. [Slides]
[31] Techniques for the automatic debugging of scientific floating-point programs.
OSQ (Open Source Quality) Retreat, Santa Cruz, CA, USA, 12-14 May 2010. [Slides]
[32] Implementation of binary floating-point arithmetic on embedded integer processors - Polynomial evaluation-based algorithms and certified code generation.
BeBOP meeting (ParLab, EECS, UC Berkeley), Berkeley, CA, USA, 30 March 2010. [Slides]
[33] Implementation of binary floating-point arithmetic on embedded integer processors - Polynomial evaluation-based algorithms and certified code generation.
Séminaire - Compilation Expertise Center (STMicroelectronics Grenoble), Grenoble, France, 16 December 2009. [Slides]
[34] Implementation of binary floating-point arithmetic on embedded integer processors - Polynomial evaluation-based algorithms and certified code generation.
Groupe de travail de l'équipe ARITH (LIRMM, Université de Montpellier II), Montpellier, France, 03 December 2009. [Slides]
[35] Fast and accurate floating-point division on ST231.
Séminaire de l'équipe DALI (Laboratoire ELIAUS, Université de Perpignan Via Domitia), Perpignan, France, 23 June 2009. [Slides]
[36] Fast and accurate floating-point division on ST231.
Journée séminaire - Optimisation de compilation pour les processeurs embarqués (LIP, ENS Lyon), Lyon, France, 15 June 2009. [Slides]
[37] A new binary floating-point division algorithm and its software implementation on the ST231 processor.
19th IEEE Symposium on Computer Arithmetic (ARITH'19), Portland, OR, USA, 8-10 June 2009. [Slides]
[38] A new binary floating-point division algorithm and its implementation in software.
Groupe de travail Arénaire (LIP-ENS Lyon), Lyon, France, 21 November 2008. [Slides]
[39] Support logiciel pour l'arithmétique flottante simple précision sur processeurs entiers.
Groupe de travail Méthodes Ensemblistes pour l'Automatique (MEA), Paris, France, 22 November 2007. [Slides]
[40] Exemple d'implantation de fonction mathématique sur ST240.
Réunion EVA-Flo, Perpignan, France, 18-19 October 2007. [Slides]
[41] Exemple d'implantation de fonction mathématique sur ST200.
Journée Arénaire/Compsys/ST (ENS Lyon), Lyon, France, 12 September 2007. [Slides]
[42] Faster floating-point square root for integer processors.
2nd IEEE International Symposium on Industrial Embedded Systems (SIES'2007), Lisbon, Portugal, 4-6 July 2007. [Slides]
[43] Racine carrée simple précision sur processeur entier.
Groupe de travail Arénaire (LIP-ENS Lyon), Lyon, France, 27 April 2007. [Slides]
[44] Algorithmes rapides pour l'évaluation polynomiale sur les nombres flottants.
Rencontres Arithmétique de l'Informatique Mathématique 2007 (RAIM'2007), Montpellier, France, 22-25 January 2007. [Slides]
[45] Algorithmes rapides pour l'évaluation polynomiale sur les nombres flottants.
Séminaire de l'équipe DALI (Laboratoire ELIAUS, Université de Perpignan Via Domitia), Perpignan, France, 16 November 2006. [Slides]

Posters

[46] Techniques for the automatic debugging of scientific floating-point programs. David H. Bailey, James Demmel, William Kahan, Guillaume Revy, and Koushik Sen.
Poster presented at the ParLab Summer Retreat, Santa Cruz, CA, USA, 24-26 May, 2010. [Poster] [Preview]
[47] Optimizing correctly-rounded reciprocal square roots for embedded VLIW cores. Claude-Pierre Jeannerod and Guillaume Revy.
Poster presented at the 43rd Asilomar Conference on Signals, Systems and Computers (Asilomar'09), Pacific Grove, CA, USA, 1-4 November, 2009. [Poster]
[48] Faster floating-point square root for integer processors. Guillaume Revy, jointly with Claude-Pierre Jeannerod, Hervé Knochel, and Christophe Monat.
Poster presented at the 2nd IEEE International Symposium on Industrial Embedded Systems (SIES'2007), Lisbon, Portugal, 4-6 July 2007. [Poster]



Last updated: Wen 20 Sep 2017 11:34:15 CEST.